Rifle

RIFLE - A General Purpose Pin-level Fault Injector
The RIFLE approach
RIFLE combines trigger and tracing techniques traditionally used in digital logic analyzers with the logic required for the pin-level fault insertion. The result is a system able to inject practically all types of pin-level faults, and capable of recording extensive information on the target processor (and system) behavior after the injection of each fault. This tracing information is used for the complete characterization of each fault and its impact on the target system (fault effective duration, the type of processor cycle affected, etc.), and for the analysis of the error propagation process. The analysis of the tracing information is automatically performed (after the injection of each fault) by the RIFLE software, which stores the key results in a spreadsheet file. Final statistical results (tables, charts, etc.) are obtained from this file.
RIFLE was used in systems based on the Z80, 68000, T805, and 8086 processors. After 1997 RIFLE was replaced by Xception in our fault injection works.

Paper on RIFLE

"RIFLE: a general purpose pin-level fault injector", H. Madeira, M. Rela, F. Moreira e J. G. Silva, in "Dependable Computing - EDCC-1", Klaus Echtle, Dieter Hammer, David Powell (Eds.) Lecture Notes in Computer Science 852, Springer Verlag, 1994, pp. 199-216 (abstract) .

Papers using RIFLE (and RIFLE predecessor)

"Validação Experimental dos Mecanismos de Detecção de Erros do Computador de Bordo do Satélite SSR", A. C. Pereira, H. Madeira, A. Paula, VII Simpósio de Computadores Tolerantes a Falhas, VII SCTF, Campo Alegre, Brasil, July, 2 to 4, 1997 (abstract in english);
"Experimental Evaluation of the Fail Silent Behavior in Programs with Consistency Checks ", M. Rela, H. Madeira e J. G. Silva, IEEE 26th Fault Tolerant Computing Symposium, FTCS-26, Sendai, Japan, June, 25 to 27, 1996 (abstract);
"Experimental evaluation of the fail-silent behavior in computers without error masking", H. Madeira e J. G. Silva, proceedings do IEEE 24th Fault Tolerant Computing Symposium, FTCS 24, Austin, USA, June, 1994, pp. 350-359 (abstract3);
"On-line Signature Learning and Checking", H. Madeira, J. Gabriel Silva, 2nd IFIP Working Conference on Dependable Computing for Critical Applications, Tucson, Arizona, USA, Feb., 18 to 20, 1991. in J.F.Meyer, R.D. Schlichting (ed.) "Dependable Computing for Critical Applications 2" Vol 6 in the series "Dependable Computing and Faul-Tolerance", Springer Verlag, Wien, 1992, pp. 395-420;
"Time Behaviour Monitoring as an Error Detection Mechanism", H. Madeira, M. Rela, P. Furtado, and J. G. Silva, Preprints da 3nd IFIP Working Conference on Dependable Computing for Critical Applications, DCCA-3, Mondello, Palermo, Sicilia, Italy, Sept., 14 to 16, 1992, pp. 121-132.
"On-line Signature Learning and Checking: experimental evaluation and results", H. Madeira e J. Gabriel Silva, proceedings de IEEE CompEuro 91: Advanced Computer Technology, Reliable Systems and Applications, Bolonha, Italy, May, 13 to 16, 1991, pp.642-646.
"A Watchdog Processor for Concurrent Error Detection in Multiple Processor Systems", Henrique Madeira, José Camões e João Gabriel Silva, in Microprocessors and Microsystems, Vol. 15, n.3, April, 1991, pp 123-130, Butterworth & Heinemann Ltd;
"Signature Verification: a New Concept for Building Simple and Effective Watchdog Processors", H. Madeira, J. Camões e J. Gabriel Silva, Proceedings of the IEEE Mediterranean Electrotechnical Conference, Melecon'91, Ljubliana, Jugoslávia, May, 22 to 24, 1991, pp 1188-1191;
"Experimental Evaluation of a Set of Simple Error Detection Mechanisms", H. Madeira, G. Quadros and J. G. Silva, Microprocessing and Microprogramming, The EUROMICRO Journal, Vol. 30, nº 1-5, pp 513-520, Aug., 1990, North-Holland.